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ADC_Module.h
1 /* Teensy 3.x, LC ADC library
2 * https://github.com/pedvide/ADC
3 * Copyright (c) 2015 Pedro Villanueva
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be
14 * included in all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
17 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
19 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
20 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
21 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 */
25
26 /* ADC_Module.h: Declarations of the fuctions of a Teensy 3.x, LC ADC module
27 *
28 */
29
30
31 #ifndef ADC_MODULE_H
32 #define ADC_MODULE_H
33
34 #include <Arduino.h>
35
36 // Easier names for the boards
37 #if defined(__MK20DX256__) // Teensy 3.1
38 #define ADC_TEENSY_3_1
39 #elif defined(__MK20DX128__) // Teensy 3.0
40 #define ADC_TEENSY_3_0
41 #elif defined(__MKL26Z64__) // Teensy LC
42 #define ADC_TEENSY_LC
43 #endif
44
45 // Teensy 3.1 has 2 ADCs, Teensy 3.0 and LC only 1.
46 #if defined(ADC_TEENSY_3_1) // Teensy 3.1
47 #define ADC_NUM_ADCS 2
48 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0
49 #define ADC_NUM_ADCS 1
50 #elif defined(ADC_TEENSY_LC) // Teensy LC
51 #define ADC_NUM_ADCS 1
52 #endif
53
54 // Use DMA?
55 #if defined(ADC_TEENSY_3_1) // Teensy 3.1
56 #define ADC_USE_DMA 1
57 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0
58 #define ADC_USE_DMA 1
59 #elif defined(ADC_TEENSY_LC) // Teensy LC
60 #define ADC_USE_DMA 1
61 #endif
62
63 // Use PGA?
64 #if defined(ADC_TEENSY_3_1) // Teensy 3.1
65 #define ADC_USE_PGA 1
66 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0
67 #define ADC_USE_PGA 0
68 #elif defined(ADC_TEENSY_LC) // Teensy LC
69 #define ADC_USE_PGA 0
70 #endif
71
72 // Use PDB?
73 #if defined(ADC_TEENSY_3_1) // Teensy 3.1
74 #define ADC_USE_PDB 1
75 #elif defined(ADC_TEENSY_3_0) // Teensy 3.0
76 #define ADC_USE_PDB 1
77 #elif defined(ADC_TEENSY_LC) // Teensy LC
78 #define ADC_USE_PDB 0
79 #endif
80
81 /* MK20DX256 Datasheet:
82 The 16-bit accuracy specifications listed in Table 24 and Table 25 are achievable on the
83 differential pins ADCx_DP0, ADCx_DM0
84 All other ADC channels meet the 13-bit differential/12-bit single-ended accuracy
85 specifications.
86
87 The results in this data sheet were derived from a system which has < 8 Ohm analog source resistance. The RAS/CAS
88 time constant should be kept to < 1ns.
89
90 ADC clock should be 2 to 12 MHz for 16 bit mode
91 ADC clock should be 1 to 18 MHz for 8-12 bit mode
92 To use the maximum ADC conversion clock frequency, the ADHSC bit must be set and the ADLPC bit must be clear
93
94 The ADHSC bit is used to configure a higher clock input frequency. This will allow
95 faster overall conversion times. To meet internal ADC timing requirements, the ADHSC
96 bit adds additional ADCK cycles. Conversions with ADHSC = 1 take two more ADCK
97 cycles. ADHSC should be used when the ADCLK exceeds the limit for ADHSC = 0.
98
99 */
100 // the alternate clock is connected to OSCERCLK (16 MHz).
101 // datasheet says ADC clock should be 2 to 12 MHz for 16 bit mode
102 // datasheet says ADC clock should be 1 to 18 MHz for 8-12 bit mode
103 // calibration works best when averages are 32 and speed is less than 4 MHz
104 // ADC_CFG1_ADICLK: 0=bus, 1=bus/2, 2=(alternative clk) altclk, 3=(async. clk) adack
105 // See below for an explanation of VERY_LOW_SPEED, LOW_SPEED, etc.
106 // TODO: add support for ADACK (asynch clock, that goes from about 2 to 6 MHz)
107 #if F_BUS == 60000000
108 #define ADC_CFG1_3_75MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1))
109 #define ADC_CFG1_7_5MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1))
110 #define ADC_CFG1_15MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1))
111
112 #define ADC_CFG1_VERY_LOW_SPEED ADC_CFG1_LOW_SPEED
113 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_3_75MHZ)
114 #define ADC_CFG1_MED_SPEED (ADC_CFG1_7_5MHZ)
115 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_7_5MHZ)
116 #define ADC_CFG1_HI_SPEED (ADC_CFG1_15MHZ)
117 #define ADC_CFG1_VERY_HIGH_SPEED ADC_CFG1_HI_SPEED
118
119 #elif F_BUS == 56000000
120 #define ADC_CFG1_3_5MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1))
121 #define ADC_CFG1_7MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1))
122 #define ADC_CFG1_14MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1))
123
124 #define ADC_CFG1_VERY_LOW_SPEED ADC_CFG1_LOW_SPEED
125 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_3_5MHZ)
126 #define ADC_CFG1_MED_SPEED (ADC_CFG1_7MHZ)
127 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_7MHZ)
128 #define ADC_CFG1_HI_SPEED (ADC_CFG1_14MHZ)
129 #define ADC_CFG1_VERY_HIGH_SPEED ADC_CFG1_HI_SPEED
130
131 #elif F_BUS == 48000000
132 #define ADC_CFG1_3MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1)) // Clock divide select: 3=div8 + Input clock: 1=bus/2
133 #define ADC_CFG1_6MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1)) // Clock divide select: 2=div4 + Input clock: 1=bus/2
134 #define ADC_CFG1_12MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1)) // Clock divide select: 1=div2 Input clock: 1=bus/2
135 #define ADC_CFG1_24MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1)) // this is way too fast, so accurancy is not guaranteed
136
137 #define ADC_CFG1_VERY_LOW_SPEED ADC_CFG1_LOW_SPEED
138 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_3MHZ)
139 #define ADC_CFG1_MED_SPEED (ADC_CFG1_6MHZ)
140 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_12MHZ)
141 #define ADC_CFG1_HI_SPEED (ADC_CFG1_12MHZ)
142 #define ADC_CFG1_VERY_HIGH_SPEED (ADC_CFG1_24MHZ)
143
144 #elif F_BUS == 40000000
145 #define ADC_CFG1_2_5MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1))
146 #define ADC_CFG1_5MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1))
147 #define ADC_CFG1_10MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1))
148 #define ADC_CFG1_20MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1)) // this is too fast, so accurancy is not guaranteed
149
150 #define ADC_CFG1_VERY_LOW_SPEED ADC_CFG1_LOW_SPEED
151 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_2_5MHZ)
152 #define ADC_CFG1_MED_SPEED (ADC_CFG1_5MHZ)
153 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_10MHZ)
154 #define ADC_CFG1_HI_SPEED (ADC_CFG1_10MHZ)
155 #define ADC_CFG1_VERY_HIGH_SPEED (ADC_CFG1_20MHZ)
156
157 #elif F_BUS == 36000000
158 #define ADC_CFG1_2_25MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1))
159 #define ADC_CFG1_4_5MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1))
160 #define ADC_CFG1_9MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1))
161 #define ADC_CFG1_18MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(1))
162
163 #define ADC_CFG1_VERY_LOW_SPEED ADC_CFG1_LOW_SPEED
164 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_2_25MHZ)
165 #define ADC_CFG1_MED_SPEED (ADC_CFG1_9MHZ)
166 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_9MHZ)
167 #define ADC_CFG1_HI_SPEED (ADC_CFG1_18MHZ)
168 #define ADC_CFG1_VERY_HIGH_SPEED ADC_CFG1_HI_SPEED
169
170 #elif F_BUS == 24000000
171 #define ADC_CFG1_1_5MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(1)) // Clock divide select: 3=div8 + Input clock: 1=bus/2
172 #define ADC_CFG1_3MHZ (ADC_CFG1_ADIV(3) + ADC_CFG1_ADICLK(0)) // Clock divide select: 3=div8 + Input clock: 0=bus
173 #define ADC_CFG1_6MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(0)) // Clock divide select: 2=div4 + Input clock: 0=bus
174 #define ADC_CFG1_12MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(0)) // Clock divide select: 1=div2 + Input clock: 0=bus
175 #define ADC_CFG1_24MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0)) // this is way too fast, so accurancy is not guaranteed
176
177 #define ADC_CFG1_VERY_LOW_SPEED (ADC_CFG1_1_5MHZ)
178 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_3MHZ)
179 #define ADC_CFG1_MED_SPEED (ADC_CFG1_6MHZ)
180 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_12MHZ)
181 #define ADC_CFG1_HI_SPEED (ADC_CFG1_12MHZ)
182 #define ADC_CFG1_VERY_HIGH_SPEED (ADC_CFG1_24MHZ)
183
184 #elif F_BUS == 4000000
185 #define ADC_CFG1_1MHZ (ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(0))
186 #define ADC_CFG1_2MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(0))
187 #define ADC_CFG1_4MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0))
188
189 #define ADC_CFG1_VERY_LOW_SPEED (ADC_CFG1_1MHZ)
190 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_2MHZ)
191 #define ADC_CFG1_MED_SPEED (ADC_CFG1_4MHZ)
192 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_4MHZ)
193 #define ADC_CFG1_HI_SPEED (ADC_CFG1_4MHZ)
194 #define ADC_CFG1_VERY_HIGH_SPEED ADC_CFG1_HI_SPEED
195
196 #elif F_BUS == 2000000
197 #define ADC_CFG1_1MHZ (ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(0))
198 #define ADC_CFG1_2MHZ (ADC_CFG1_ADIV(0) + ADC_CFG1_ADICLK(0))
199
200 #define ADC_CFG1_VERY_LOW_SPEED (ADC_CFG1_1MHZ)
201 #define ADC_CFG1_LOW_SPEED (ADC_CFG1_2MHZ)
202 #define ADC_CFG1_MED_SPEED (ADC_CFG1_2MHZ)
203 #define ADC_CFG1_HI_SPEED_16_BITS (ADC_CFG1_2MHZ)
204 #define ADC_CFG1_HI_SPEED (ADC_CFG1_2MHZ)
205 #define ADC_CFG1_VERY_HIGH_SPEED ADC_CFG1_HI_SPEED
206
207 #else
208 #error "F_BUS must be 60, 56, 48, 40, 36, 24, 4 or 2 MHz"
209 #endif
210
211 // mask the important bit in each register
212 #define ADC_CFG1_ADICLK_MASK_1 (1<<1)
213 #define ADC_CFG1_ADICLK_MASK_0 (1<<0)
214
215 #define ADC_CFG1_ADIV_MASK_1 (1<<6)
216 #define ADC_CFG1_ADIV_MASK_0 (1<<5)
217
218 // Settings for the power/speed of conversions/sampling
219 /* For conversion speeds:
220 ADC_VERY_LOW_SPEED is guaranteed to be the lowest possible speed within specs for resolutions less than 16 bits (higher than 1 MHz),
221 it's different from ADC_LOW_SPEED only for 24, 4 or 2 MHz.
222 ADC_LOW_SPEED is guaranteed to be the lowest possible speed within specs for all resolutions (higher than 2 MHz).
223 ADC_MED_SPEED is always >= ADC_LOW_SPEED and <= ADC_HIGH_SPEED.
224 ADC_HIGH_SPEED_16BITS is guaranteed to be the highest possible speed within specs for all resolutions (lower or eq than 12 MHz).
225 ADC_HIGH_SPEED is guaranteed to be the highest possible speed within specs for resolutions less than 16 bits (lower or eq than 18 MHz).
226 ADC_VERY_HIGH_SPEED may be out of specs, it's different from ADC_HIGH_SPEED only for 48, 40 or 24 MHz.
227 */
228 /* For sampling speeds:
229 ADC_VERY_LOW_SPEED is the lowest possible sampling speed (+24 ADCK).
230 ADC_LOW_SPEED adds +16 ADCK.
231 ADC_MED_SPEED adds +10 ADCK.
232 ADC_HIGH_SPEED (or ADC_HIGH_SPEED_16BITS) adds +6 ADCK.
233 ADC_VERY_HIGH_SPEED is the highest possible sampling speed (0 ADCK added).
234 */
235 #define ADC_VERY_LOW_SPEED 0
236 #define ADC_LOW_SPEED 1
237 #define ADC_MED_SPEED 2
238 #define ADC_HIGH_SPEED_16BITS 3
239 #define ADC_HIGH_SPEED 4
240 #define ADC_VERY_HIGH_SPEED 5
241
242 // Alternative asynchronous clock for ADC.
243 // 2.4, 4.0, 5.2 and 6.2 MHz clock independent on the bus frequency.
244 #define ADC_ADACK_2_4 16
245 #define ADC_ADACK_4_0 17
246 #define ADC_ADACK_5_2 18
247 #define ADC_ADACK_6_2 19
248
249
250 // Mask for the channel selection in ADCx_SC1A,
251 // useful if you want to get the channel number from ADCx_SC1A
252 #define ADC_SC1A_CHANNELS (0x1F)
253 // 0x1F=31 in the channel2sc1aADCx means the pin doesn't belong to the ADC module
254 #define ADC_SC1A_PIN_INVALID (0x1F)
255 // max number of pins, size of channel2sc1aADCx
256 #define ADC_MAX_PIN (44)
257 // Muxsel mask, pins in channel2sc1aADCx with bit 7 set use mux A.
258 #define ADC_SC1A_PIN_MUX (0x80)
259 // Differential pin mask, pins in channel2sc1aADCx with bit 6 set are differential pins.
260 #define ADC_SC1A_PIN_DIFF (0x40)
261 // PGA mask. The pins can use PGA on that ADC
262 #define ADC_SC1A_PIN_PGA (0x80)
263
264
265 // ADCx_SC2[REFSEL] bit selects the voltage reference sources for ADC.
266 #define ADC_REF_DEFAULT 0
267 #define ADC_REF_ALT 1
268 #if defined(ADC_TEENSY_3_0) || defined(ADC_TEENSY_3_1)
269 // default is the external, that is connected to the 3.3V supply.
270 // To use the external simply connect AREF to a different voltage
271 // alt is connected to the 1.2 V ref.
272 #define ADC_REF_3V3 ADC_REF_DEFAULT
273 #define ADC_REF_1V2 ADC_REF_ALT
274 #define ADC_REF_EXT ADC_REF_DEFAULT
275
276 #elif defined(ADC_TEENSY_LC)
277 // alt is the internal ref, 3.3 V
278 // the default is AREF
279 #define ADC_REF_3V3 ADC_REF_ALT
280 #define ADC_REF_EXT ADC_REF_DEFAULT
281 #endif
282
283
284 // Error codes for analogRead and analogReadDifferential
285 #define ADC_ERROR_DIFF_VALUE (-70000)
286 #define ADC_ERROR_VALUE ADC_ERROR_DIFF_VALUE
287
288 // Error flag masks.
289 // Possible errors are: other, calibration, wrong pin, analogRead, analogDifferentialRead, continuous, continuousDifferential
290 // To globaly disable an error simply change (1<<x) to (0<<x), revert to enable the error again.
291 #define ADC_ERROR_ALL 0x3FF
292 #define ADC_ERROR_CLEAR 0x0
293 #define ADC_ERROR_OTHER (1<<0)
294 #define ADC_ERROR_CALIB (1<<1)
295 #define ADC_ERROR_WRONG_PIN (1<<2)
296 #define ADC_ERROR_ANALOG_READ (1<<3)
297 #define ADC_ERROR_COMPARISON (1<<4)
298 #define ADC_ERROR_ANALOG_DIFF_READ (1<<5)
299 #define ADC_ERROR_CONT (1<<6)
300 #define ADC_ERROR_CONT_DIFF (1<<7)
301 #define ADC_ERROR_WRONG_ADC (0<<8)
302 #define ADC_ERROR_SYNCH (1<<9)
303
304
305 // Other things to measure with the ADC that don't use external pins
306 // In my Teensy I read 1.22 V for the ADC_VREF_OUT (doesn't exist in Teensy LC), random values for ADC_BANDGAP,
307 // 3.3 V for ADC_VREFH and 0.0 V for ADC_VREFL.
308 #define ADC_TEMP_SENSOR 38 // 0.719 V at 25ºC and slope of 1.715 mV/ºC for Teensy 3.x and 0.716 V, 1.62 mV/ºC for Teensy LC
309 #define ADC_VREF_OUT 39
310 #define ADC_BANDGAP 41
311 #define ADC_VREFH 42
312 #define ADC_VREFL 43
313
314
315 // debug mode: blink the led light
316 #define ADC_debug 0
317
318
319 // defines for the bit position in the registers, this makes it easy in case they change in different boards
320 #define ADC_SC1A_COCO_BIT (7)
321 #define ADC_SC1A_AIEN_BIT (6)
322 #define ADC_SC1_DIFF_BIT (5)
323
324 #define ADC_CFG1_ADLPC_BIT (7)
325 #define ADC_CFG1_ADIV1_BIT (6)
326 #define ADC_CFG1_ADIV0_BIT (5)
327 #define ADC_CFG1_ADLSMP_BIT (4)
328 #define ADC_CFG1_MODE1_BIT (3)
329 #define ADC_CFG1_MODE0_BIT (2)
330 #define ADC_CFG1_ADICLK1_BIT (1)
331 #define ADC_CFG1_ADICLK0_BIT (0)
332
333 #define ADC_CFG2_MUXSEL_BIT (4)
334 #define ADC_CFG2_ADACKEN_BIT (3)
335 #define ADC_CFG2_ADHSC_BIT (2)
336 #define ADC_CFG2_ADLSTS1_BIT (1)
337 #define ADC_CFG2_ADLSTS0_BIT (0)
338
339 #define ADC_SC2_ADACT_BIT (7)
340 #define ADC_SC2_ADTRG_BIT (6)
341 #define ADC_SC2_ACFE_BIT (5)
342 #define ADC_SC2_ACFGT_BIT (4)
343 #define ADC_SC2_ACREN_BIT (3)
344 #define ADC_SC2_DMAEN_BIT (2)
345 #define ADC_SC2_REFSEL0_BIT (0)
346
347 #define ADC_SC3_CAL_BIT (7)
348 #define ADC_SC3_CALF_BIT (6)
349 #define ADC_SC3_ADCO_BIT (3)
350 #define ADC_SC3_AVGE_BIT (2)
351 #define ADC_SC3_AVGS1_BIT (1)
352 #define ADC_SC3_AVGS0_BIT (0)
353
354 #define ADC_PGA_PGAEN_BIT (23)
355
359 class ADC_Module {
360
361 public:
362
364
368 ADC_Module(uint8_t ADC_number, const uint8_t* const a_channel2sc1a, const uint8_t* const a_channel2sc1a_diff);
369
370
372
375 void recalibrate();
376
378 void calibrate();
379
381 void wait_for_cal();
382
383
385
387
392 void setReference(uint8_t type);
393
394
396
405 void setResolution(uint8_t bits);
406
408 uint8_t getResolution();
409
411 uint32_t getMaxValue();
412
413
415
432 void setConversionSpeed(uint8_t speed);
433
434
436
445 void setSamplingSpeed(uint8_t speed);
446
447
449
454 void setAveraging(uint8_t num);
455
456
458
461 void enableInterrupts();
462
464 void disableInterrupts();
465
466
468
471 void enableDMA();
472
474 void disableDMA();
475
476
478
483 void enableCompare(int16_t compValue, bool greaterThan);
484
486
492 void enableCompareRange(int16_t lowerLimit, int16_t upperLimit, bool insideRange, bool inclusive);
493
495 void disableCompare();
496
497
499
504 void enablePGA(uint8_t gain);
505
507
509 uint8_t getPGA();
510
512 void disablePGA();
513
514
516 void continuousMode() __attribute__((always_inline)) {
517 setBit(ADC_SC3, ADC_SC3_ADCO_BIT);
518 }
520 void singleMode() __attribute__((always_inline)) {
521 clearBit(ADC_SC3, ADC_SC3_ADCO_BIT);
522 }
523
525 void setSoftwareTrigger() __attribute__((always_inline)) {
526 clearBit(ADC_SC2, ADC_SC2_ADTRG_BIT);
527 }
528
530 void setHardwareTrigger() __attribute__((always_inline)) {
531 setBit(ADC_SC2, ADC_SC2_ADTRG_BIT);
532 }
533
534
536
538 bool isConverting() __attribute__((always_inline)) {
539 //return (*ADC_SC2_adact);
540 return getBit(ADC_SC2, ADC_SC2_ADACT_BIT);
541 //return ((*ADC_SC2) & ADC_SC2_ADACT) >> 7;
542 }
543
545
550 bool isComplete() __attribute__((always_inline)) {
551 //return (*ADC_SC1A_coco);
552 return getBit(ADC_SC1A, ADC_SC1A_COCO_BIT);
553 //return ((*ADC_SC1A) & ADC_SC1_COCO) >> 7;
554 }
555
557 bool isDifferential() __attribute__((always_inline)) {
558 //return ((*ADC_SC1A) & ADC_SC1_DIFF) >> 5;
559 return getBit(ADC_SC1A, ADC_SC1_DIFF_BIT);
560 }
561
563 bool isContinuous() __attribute__((always_inline)) {
564 //return (*ADC_SC3_adco);
565 return getBit(ADC_SC3, ADC_SC3_ADCO_BIT);
566 //return ((*ADC_SC3) & ADC_SC3_ADCO) >> 3;
567 }
568
570 bool isPGAEnabled() __attribute__((always_inline)) {
571 return getBit(ADC_PGA, ADC_PGA_PGAEN_BIT);
572 }
573
574
576
578 bool checkPin(uint8_t pin);
579
581
583 bool checkDifferentialPins(uint8_t pinP, uint8_t pinN);
584
585
587
589
592 void startReadFast(uint8_t pin); // helper method
593
595
598 void startDifferentialFast(uint8_t pinP, uint8_t pinN);
599
600
602
604
608 int analogRead(uint8_t pin);
609
610
612
619 int analogReadDifferential(uint8_t pinP, uint8_t pinN);
620
621
623
625
629 bool startSingleRead(uint8_t pin);
630
632
638 bool startSingleDifferential(uint8_t pinP, uint8_t pinN);
639
641
644 int readSingle() __attribute__((always_inline)) {
645 return analogReadContinuous();
646 }
647
648
650
652
654 bool startContinuous(uint8_t pin);
655
657
662 bool startContinuousDifferential(uint8_t pinP, uint8_t pinN);
663
665
670 int analogReadContinuous() __attribute__((always_inline)) {
671 return (int16_t)(int32_t)*ADC_RA;
672 }
673
675 void stopContinuous();
676
677
680 #if ADC_USE_PDB
681
682 // software trigger enable PDB PDB interrupt
683 #define PDB_CONFIG (PDB_SC_TRGSEL(15) | PDB_SC_PDBEN | PDB_SC_PDBIE \
684 | PDB_SC_CONT | PDB_SC_LDMOD(0))
685 // continuous mode load immediately
686
687 #define PDB_CHnC1_TOS_1 0x0100
688 #define PDB_CHnC1_EN_1 0x01
689
691
695 void startPDB(uint32_t freq);
696
698
700 void stopPDB();
701
702 #endif
703
704
706
708 struct ADC_Config {
709 uint32_t savedSC1A, savedSC2, savedSC3, savedCFG1, savedCFG2;
710 } adc_config;
711
713 uint8_t adcWasInUse;
714
716 void saveConfig(ADC_Config* config) {
717 config->savedSC1A = *ADC_SC1A;
718 config->savedCFG1 = *ADC_CFG1;
719 config->savedCFG2 = *ADC_CFG2;
720 config->savedSC2 = *ADC_SC2;
721 config->savedSC3 = *ADC_SC3;
722 }
723
725 void loadConfig(ADC_Config* config) {
726 *ADC_CFG1 = config->savedCFG1;
727 *ADC_CFG2 = config->savedCFG2;
728 *ADC_SC2 = config->savedSC2;
729 *ADC_SC3 = config->savedSC3;
730 *ADC_SC1A = config->savedSC1A; // restore last
731 }
732
733
735 uint8_t num_measurements;
736
737
739
741 volatile uint16_t fail_flag;
742
743
745 uint8_t ADC_num;
746
747
748 private:
749
750 // is set to 1 when the calibration procedure is taking place
751 volatile uint8_t calibrating;
752
753 // the first calibration will use 32 averages and lowest speed,
754 // when this calibration is over the averages and speed will be set to default.
755 uint8_t init_calib;
756
757 // resolution
758 uint8_t analog_res_bits;
759
760 // maximum value possible 2^res-1
761 uint32_t analog_max_val;
762
763 // num of averages
764 uint8_t analog_num_average;
765
766 // reference can be internal or external
767 uint8_t analog_reference_internal;
768
769 // are interrupts enabled?
770 uint8_t var_enableInterrupts;
771
772 // value of the pga
773 uint8_t pga_value;
774
775 // conversion speed
776 uint8_t conversion_speed;
777
778 // sampling speed
779 uint8_t sampling_speed;
780
781 // translate pin number to SC1A nomenclature
782 const uint8_t* const channel2sc1a;
783
784 // same for differential pins
785 const uint8_t* const channel2sc1a_diff;
786
787
788
790 void analog_init();
791
792
794 void startInternalReference();
795
797 void stopInternalReference();
798
799
801 /* Clear bit in address (make it zero), set bit (make it one) or return the value of that bit
802 * We can change this functions depending on the board.
803 * Teensy 3.x use bitband while Teensy LC has a more advanced bit manipulation engine.
804 */
805 #if defined(ADC_TEENSY_3_1) || defined(ADC_TEENSY_3_0)
806 // bitband
807 #define ADC_BITBAND_ADDR(reg, bit) (((uint32_t)(reg) - 0x40000000) * 32 + (bit) * 4 + 0x42000000)
808
809 __attribute__((always_inline)) void setBit(volatile uint32_t* reg, uint8_t bit) {
810 (*(uint32_t *)ADC_BITBAND_ADDR((reg), (bit))) = 1;
811 }
812 __attribute__((always_inline)) void clearBit(volatile uint32_t* reg, uint8_t bit) {
813 (*(uint32_t *)ADC_BITBAND_ADDR((reg), (bit))) = 0;
814 }
815
816 __attribute__((always_inline)) void changeBit(volatile uint32_t* reg, uint8_t bit, bool state) {
817 (*(uint32_t *)ADC_BITBAND_ADDR((reg), (bit))) = state;
818 }
819
820 __attribute__((always_inline)) volatile bool getBit(volatile uint32_t* reg, uint8_t bit) {
821 return (volatile bool)*(uint32_t*)(ADC_BITBAND_ADDR(reg, bit));
822 }
823
824 #elif defined(ADC_TEENSY_LC)
825 // bit manipulation engine
826 //#define ADC_SETBIT_ATOMIC(reg, bit) (*(uint32_t *)(((uint32_t)&(reg) - 0xF8000000) | 0x48000000) = 1 << (bit)) // OR
827 //#define ADC_CLRBIT_ATOMIC(reg, bit) (*(uint32_t *)(((uint32_t)&(reg) - 0xF8000000) | 0x44000000) = ~(1 << (bit))) // XOR
828
829 __attribute__((always_inline)) void setBit(volatile uint32_t* reg, uint8_t bit) {
830 //temp = *(uint32_t *)((uint32_t)(reg) | (1<<26) | (bit<<21)); // LAS
831 *(volatile uint32_t*)((uint32_t)(reg) | (1<<27)) = 1<<bit; // OR
832 }
833 __attribute__((always_inline)) void clearBit(volatile uint32_t* reg, uint8_t bit) {
834 //temp = *(uint32_t *)((uint32_t)(reg) | (3<<27) | (bit<<21)); // LAC
835 *(volatile uint32_t*)((uint32_t)(reg) | (1<<26)) = ~(1<<bit); // AND
836 }
837
838 __attribute__((always_inline)) void changeBit(volatile uint32_t* reg, uint8_t bit, bool state) {
839 //temp = *(uint32_t *)((uint32_t)(reg) | ((3-2*!!state)<<27) | (bit<<21)); // LAS/LAC
840 if(state) { // set
841 *(volatile uint32_t*)((uint32_t)(reg) | (1<<27)) = 1<<bit; // OR
842 } else { // clear
843 *(volatile uint32_t*)((uint32_t)(reg) | (1<<26)) = ~(1<<bit); // AND
844 }
845
846 }
847
848 __attribute__((always_inline)) volatile bool getBit(volatile uint32_t* reg, uint8_t bit) {
849 return (volatile bool)*(uint32_t *)((uint32_t)(reg) | (1<<28) | (bit<<23) ); // UBFX
850 }
851
852 #endif
853
854 uint32_t adc_offset;
855
856 // registers point to the correct ADC module
857 typedef volatile uint32_t* const reg;
858
859 // registers that control the adc modulesetSoftwareTrigger
860 reg ADC_SC1A; //reg ADC_SC1A_aien; reg ADC_SC1A_coco;
861 reg ADC_SC1B;
862
863 reg ADC_CFG1; //reg ADC_CFG1_adlpc; reg ADC_CFG1_adiv0, ADC_CFG1_adiv1; reg ADC_CFG1_adlsmp;
864 // reg ADC_CFG1_mode0, ADC_CFG1_mode1; reg ADC_CFG1_adiclk0, ADC_CFG1_adiclk1;
865 reg ADC_CFG2; //reg ADC_CFG2_muxsel; reg ADC_CFG2_adacken; reg ADC_CFG2_adhsc; reg ADC_CFG2_adlsts1, ADC_CFG2_adlsts0;
866
867 reg ADC_RA;
868 reg ADC_RB;
869
870 reg ADC_CV1;
871 reg ADC_CV2;
872
873 reg ADC_SC2; //reg ADC_SC2_adact; reg ADC_SC2_ref; reg ADC_SC2_dma; reg ADC_SC2_cfe; reg ADC_SC2_cfgt; reg ADC_SC2_cren;
874 reg ADC_SC3; //reg ADC_SC3_cal, ADC_SC3_calf; reg ADC_SC3_avge; reg ADC_SC3_avgs0, ADC_SC3_avgs1; reg ADC_SC3_adco;
875
876 reg ADC_PGA; //reg ADC_PGA_pgaen;
877
878 reg ADC_OFS;
879 reg ADC_PG;
880 reg ADC_MG;
881 reg ADC_CLPD;
882 reg ADC_CLPS;
883 reg ADC_CLP4;
884 reg ADC_CLP3;
885 reg ADC_CLP2;
886 reg ADC_CLP1;
887 reg ADC_CLP0;
888 reg ADC_CLMD;
889 reg ADC_CLMS;
890 reg ADC_CLM4;
891 reg ADC_CLM3;
892 reg ADC_CLM2;
893 reg ADC_CLM1;
894 reg ADC_CLM0;
895
896 reg PDB0_CHnC1; // PDB channel 0 or 1
897
898 uint8_t IRQ_ADC; // IRQ number will be IRQ_ADC0 or IRQ_ADC1
899
900
901 protected:
902
903
904 };
905
906
907 #endif // ADC_MODULE_H
ADC_Module::enableCompareRange
void enableCompareRange(int16_t lowerLimit, int16_t upperLimit, bool insideRange, bool inclusive)
Enable the compare function to a range.
Definition: ADC_Module.cpp:730
ADC_Module::setSamplingSpeed
void setSamplingSpeed(uint8_t speed)
Sets the sampling speed.
Definition: ADC_Module.cpp:560
ADC_Module::disableCompare
void disableCompare()
Disable the compare function.
Definition: ADC_Module.cpp:769
ADC_Module::isConverting
bool isConverting() __attribute__((always_inline))
Is the ADC converting at the moment?
Definition: ADC_Module.h:538
ADC_Module::recalibrate
void recalibrate()
Starts the calibration sequence, waits until it&#39;s done and writes the results.
Definition: ADC_Module.cpp:289
ADC_Module::isDifferential
bool isDifferential() __attribute__((always_inline))
Is the ADC in differential mode?
Definition: ADC_Module.h:557
ADC_Module::checkDifferentialPins
bool checkDifferentialPins(uint8_t pinP, uint8_t pinN)
Check whether the pins are a valid analog differential pair of pins.
Definition: ADC_Module.cpp:845
ADC_Module::stopContinuous
void stopContinuous()
Stops continuous conversion.
Definition: ADC_Module.cpp:1241
ADC_Module::num_measurements
uint8_t num_measurements
Number of measurements that the ADC is performing.
Definition: ADC_Module.h:735
ADC_Module::calibrate
void calibrate()
Starts the calibration sequence.
Definition: ADC_Module.cpp:223
ADC_Module::disablePGA
void disablePGA()
Disable PGA.
Definition: ADC_Module.cpp:815
ADC_Module::getMaxValue
uint32_t getMaxValue()
Returns the maximum value for a measurement: 2^res-1.
Definition: ADC_Module.cpp:420
ADC_Module
Definition: ADC_Module.h:359
ADC_Module::analogReadDifferential
int analogReadDifferential(uint8_t pinP, uint8_t pinN)
Reads the differential analog value of two pins (pinP - pinN).
Definition: ADC_Module.cpp:1013
ADC_Module::ADC_num
uint8_t ADC_num
Which adc is this?
Definition: ADC_Module.h:745
ADC_Module::readSingle
int readSingle() __attribute__((always_inline))
Reads the analog value of a single conversion.
Definition: ADC_Module.h:644
ADC_Module::isComplete
bool isComplete() __attribute__((always_inline))
Is an ADC conversion ready?
Definition: ADC_Module.h:550
ADC_Module::enableDMA
void enableDMA()
Enable DMA request.
Definition: ADC_Module.cpp:689
ADC_Module::enableCompare
void enableCompare(int16_t compValue, bool greaterThan)
Enable the compare function to a single value.
Definition: ADC_Module.cpp:712
ADC_Module::continuousMode
void continuousMode() __attribute__((always_inline))
Set continuous conversion mode.
Definition: ADC_Module.h:516
ADC_Module::analogReadContinuous
int analogReadContinuous() __attribute__((always_inline))
Reads the analog value of a continuous conversion.
Definition: ADC_Module.h:670
ADC_Module::startSingleDifferential
bool startSingleDifferential(uint8_t pinP, uint8_t pinN)
Start a differential conversion between two pins (pinP - pinN) and enables interrupts.
Definition: ADC_Module.cpp:1132
ADC_Module::isPGAEnabled
bool isPGAEnabled() __attribute__((always_inline))
Is the PGA function enabled?
Definition: ADC_Module.h:570
ADC_Module::setConversionSpeed
void setConversionSpeed(uint8_t speed)
Sets the conversion speed.
Definition: ADC_Module.cpp:437
ADC_Module::setHardwareTrigger
void setHardwareTrigger() __attribute__((always_inline))
Use hardware to trigger the ADC.
Definition: ADC_Module.h:530
ADC_Module::startContinuousDifferential
bool startContinuousDifferential(uint8_t pinP, uint8_t pinN)
Starts continuous conversion between the pins (pinP-pinN).
Definition: ADC_Module.cpp:1205
ADC_Module::startDifferentialFast
void startDifferentialFast(uint8_t pinP, uint8_t pinN)
Starts a differential conversion on the pair of pins.
Definition: ADC_Module.cpp:905
ADC_Module::fail_flag
volatile uint16_t fail_flag
This flag indicates that some kind of error took place.
Definition: ADC_Module.h:741
ADC_Module::ADC_Config
Store the config of the adc.
Definition: ADC_Module.h:708
ADC_Module::startPDB
void startPDB(uint32_t freq)
Start PDB triggering the ADC at the frequency.
Definition: ADC_Module.cpp:1261
ADC_Module::saveConfig
void saveConfig(ADC_Config *config)
Save config of the ADC to the ADC_Config struct.
Definition: ADC_Module.h:716
ADC_Module::getPGA
uint8_t getPGA()
Returns the PGA level.
Definition: ADC_Module.cpp:810
ADC_Module::setResolution
void setResolution(uint8_t bits)
Change the resolution of the measurement.
Definition: ADC_Module.cpp:358
ADC_Module::checkPin
bool checkPin(uint8_t pin)
Check whether the pin is a valid analog pin.
Definition: ADC_Module.cpp:827
ADC_Module::singleMode
void singleMode() __attribute__((always_inline))
Set single-shot conversion mode.
Definition: ADC_Module.h:520
ADC_Module::startContinuous
bool startContinuous(uint8_t pin)
Starts continuous conversion on the pin.
Definition: ADC_Module.cpp:1178
ADC_Module::ADC_Module
ADC_Module(uint8_t ADC_number, const uint8_t *const a_channel2sc1a, const uint8_t *const a_channel2sc1a_diff)
Constructor.
Definition: ADC_Module.cpp:42
ADC_Module::disableDMA
void disableDMA()
Disable ADC DMA request.
Definition: ADC_Module.cpp:700
ADC_Module::analogRead
int analogRead(uint8_t pin)
Returns the analog value of the pin.
Definition: ADC_Module.cpp:946
ADC_Module::startSingleRead
bool startSingleRead(uint8_t pin)
Starts an analog measurement on the pin and enables interrupts.
Definition: ADC_Module.cpp:1097
ADC_Module::adcWasInUse
uint8_t adcWasInUse
Was the adc in use before a call?
Definition: ADC_Module.h:713
ADC_Module::wait_for_cal
void wait_for_cal()
Waits until calibration is finished and writes the corresponding registers.
Definition: ADC_Module.cpp:242
ADC_Module::getResolution
uint8_t getResolution()
Returns the resolution of the ADC_Module.
Definition: ADC_Module.cpp:413
ADC_Module::setSoftwareTrigger
void setSoftwareTrigger() __attribute__((always_inline))
Use software to trigger the ADC, this is the most common setting.
Definition: ADC_Module.h:525
ADC_Module::setReference
void setReference(uint8_t type)
Set the voltage reference you prefer, default is vcc.
Definition: ADC_Module.cpp:305
ADC_Module::setAveraging
void setAveraging(uint8_t num)
Set the number of averages.
Definition: ADC_Module.cpp:617
ADC_Module::isContinuous
bool isContinuous() __attribute__((always_inline))
Is the ADC in continuous mode?
Definition: ADC_Module.h:563
ADC_Module::enableInterrupts
void enableInterrupts()
Enable interrupts.
Definition: ADC_Module.cpp:661
ADC_Module::stopPDB
void stopPDB()
Stop the PDB.
Definition: ADC_Module.cpp:1361
ADC_Module::disableInterrupts
void disableInterrupts()
Disable interrupts.
Definition: ADC_Module.cpp:675
ADC_Module::enablePGA
void enablePGA(uint8_t gain)
Enable and set PGA.
Definition: ADC_Module.cpp:780
ADC_Module::startReadFast
void startReadFast(uint8_t pin)
Starts a single-ended conversion on the pin.
Definition: ADC_Module.cpp:884
ADC_Module::loadConfig
void loadConfig(ADC_Config *config)
Load config to the ADC.
Definition: ADC_Module.h:725